Faint Vertical Lines on Famicom Video Output

[133MHz]

I decided to create a new thread for this, since we're really getting somewhere near to the roots of the issue.

The ghosting effect has to do with an issue of the PPU Sync pin being relatively close to some of the PPU control bus signal pins, among some video noise caused by the CLK crystal...In other words, a bad design....After some experimentation, I've finally been able to get rid of them in a Famicom.....A filter amp has to be built around the PPU Sync pin 22 and the native 21.47727 Xtal....The NES has it, so does the Famicom AV...

Interesting. My Famicom had the faint vertical lines on its video output and they got worse when using the FDS, so I suspected a power supply problem and replacing the main filter capacitor fixed it. Maybe deficient power aggravates the original issue, but good power doesn't make it go away completely.

I did notice what you explained when experimenting on overclocking my NES about two years ago. Poor shielding of the main CLK signal causes vertical lines on the picture, and the Famicom's motherboard isn't very well designed in that respect. Probably this wasn't a problem when it was new, but normal component drift with age could make it more prominent.

So basically the solution you came up with is buffering the CLK signal to the PPU? I checked out some technical docs on the 2C02 and it seems that on a Famicom Pin 22 (/SYNC) is always held high. On a NES this pin is wired to the CPU's reset input so that the picture blanks out when pushing the reset switch on the console unlike the Famicom which shows frozen/glitchy garbage.

/SYNC: this signal when zero, will force the status of colorburst control, scanline and pixel counters/flip-flops used inside the PPU to definite states. Generally, this is the means of which two 2C02s connected together in a master-slave config (via the EXT bus) can syncronize together; the master PPU's /VBL line feeds the vblank information to the slave's /SYNC input. On Famicom consoles, this pin is always tied to logical one. On the NES however, this pin is tied in with the 2A03's reset input, and as a result, the picture is always disabled while the reset switch is held in on an NES.

If Pin 22 is always high it shouldn't produce interference unless it was weakly pulled up and prone to it.
What about the CLK signal? Did you build a simple transistor amplifier to buffer it?

[Bobinsky]

I have the same exact problem.